Draft NLNet Grant Proposal -- Libre-Chip's CPU with a Programmable Decoder to Run Multiple ISAs at Full Speed

I posted a draft version of the grant proposal at: #1 - WIP: add grant proposal: Libre-Chip's CPU with a Programmable Decoder to Run Multiple ISAs at Full Speed - libre-chip/website - Libre-Chip.org
A rendered version is visible on my branch at: website/src/grants/cpu_with_programmable_decoder.md at add-grant-proposal-cpu-with-programmable-decoder - programmerjake/website - Libre-Chip.org

Please let me know what you think, what edits to make if any, and also @HaeckseAlex if you want to participate in this grant (others are welcome too).

As a reminder, I'm planning on finalizing and submitting the proposal on Sunday night my time (PST) since the deadline is Dec 1st at 12:00 CET