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Welcome to Libre-Chip Forum! :wave:
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0
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17
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July 8, 2024
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About the General category
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5
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July 8, 2024
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Creating a 1 paragraph summary of NLnet grant proposal 2024-12-324
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8
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June 3, 2025
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Responding to NLnet's questions for grant proposal 2024-12-324
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1
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8
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May 12, 2025
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Idea for maybe allowing much wider fetch/rename/etc. widths in a CPU
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1
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19
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January 16, 2025
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starting working on a nlnet grant proposal
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4
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12
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December 1, 2024
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I wrote a mostly-working instruction extractor for the OPF PowerISA 3.1C pdf
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11
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October 28, 2024
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libre-chip/cpu CI issues
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2
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17
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October 22, 2024
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Released fayalite v0.2.0
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3
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October 18, 2024
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Proposal for Libre-Chip's First CPU Architecture
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6
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34
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October 13, 2024
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Is Fayalite ready for releasing version 0.2.0?
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1
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15
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October 13, 2024
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Testing creating a new thread via email
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5
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October 7, 2024
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Create Discourse topic by email
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1
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5
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October 7, 2024
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Formal verification in Fayalite
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3
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11
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October 7, 2024
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Syntax suggestions for Fayalite
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3
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7
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October 7, 2024
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Another HDL in Rust
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1
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17
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September 8, 2024
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Simulator for Fayalite
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1
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26
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September 8, 2024
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Ideas for what to do initially
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18
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August 15, 2024
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Adding Docs for Fayalite
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3
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16
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July 24, 2024
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