It was suggested that we should have a more detailed architectural plan for our CPU, so I created the following proposal: https://libre-chip.org/first_arch/
I tried to show how small it can be made and that I don't think we're biting off more than we can chew.
So, what do you all think? Does this seem like a workable plan for our initial CPU design?
The main resource I used when I originally learned how to make an OoO, superscalar, speculative architecture is Computer Architecture: A Quantitative Approach.
Do note that the design I'm proposing uses register renaming instead of Tomasulo's algorithm.
The main resource I used when I originally learned how to make an OoO,
superscalar, speculative architecture is Computer Architecture: A
Quantitative Approach.
Nice. It seems the library at my institution has the 4th edition, from
2006. I'll take it out, and give it a read.
Do note that the design I'm proposing uses register renaming instead of
Tomasulo's algorithm.
It seems to cover it, I found both the 4th and 6th editions on archive.org and the section you probably want is titled "Speculation: Implementation Issues and Extensions" which has a subsection on register renaming (on page 127 of the 4th edition and page 234 of the 6th edition).
Indeed. I got the book from the library, and will read the chapter shortly.
By the way, I also have read the FIRRTL specification and ABI, and
started reading "Digital Design with Chisel". I remember reading about
Chisel a some time ago, but only now it starts to make some sense.